Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL). The counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the Clock-Down input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input). A high level on the MR input overrides any other input to clear the counter to its zero state. The Terminal Count up (carry) goes low half a clock period before the zero count is reached and returns to a high level at the zero count. The Terminal Count Down (borrow) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 192 and 15 in the 193) and returns to high at the maximum count. Cascading is effected by connecting the carry and borrow outputs of a less significant counter to the Clock-Up and CLock-Down inputs, respectively, of the next most significant counter.NIf a decade counter is present to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one count as shown in state diagram.NFeatures Synchronous Counting and Asynchronous Loading Two Outputs for N-Bit Cascading Look-Ahead Carry for High-Speed Counting Fanout (Over Temperature Range) IC digital 4bit, up/down counter, presettable, synchronous THT Manufacturer TEXAS INSTRUMENTS Integrated circuit type digital Kind of IC 4bit, up/down counter, pre settable, synchronous Series HC Mounting THT Case DIP16 Supply voltage 2...6V DC Additional information Gross weight 0.96 g