The NOR gate is a digital logic gate that implements logical NOR  it behaves according to the truth table to the right. A HIGH output results if both the inputs to the gate are LOW; if one or both input is HIGH, a LOW output results. Features: Standard Pin Configuration Operating Temperature to 70C High-Speed Low Power CMOS Type Typical propagation delay: 8ns Wide power supply range: 2-6V Low input current: 1uA maximum Fanout of 10 LS-TTL loads Complies with JEDEC standard no. 8-1A